SKU: 28945620036

Singxer SU-6 USB Digital Interface XMOS XU208 CPLD Femtosecond

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Description

Singxer SU-6 USB Digital Interface XMOS XU208 CPLD FemtosecondBrand Name: SHANLING Input Format: MP3 Input Format: DSD Inputs: USB Type A Inputs: Optical (SPDIF) Inputs: Coaxial Inputs: HDMI Outputs: RCA Outputs: 3. 5 mm Built in HDD: No Network: Wired LAN APP Control: ios APP Control: Android Remote Control: No Bluetooth: No FM AM Tuner: No Material: Metal Model Number: SU 6 model: SU 6 SpecificationsSplit Product introduction: The SU 6 digital interface is a new generation of high performance USB digital audio

  • Brand Name: SHANLING
  • Input Format: MP3
  • Input Format: DSD
  • Inputs: USB Type-A
  • Inputs: Optical (SPDIF)
  • Inputs: Coaxial
  • Inputs: HDMI
  • Outputs: RCA
  • Outputs: 3.5 mm
  • Built-in HDD: No
  • Network: Wired LAN
  • APP Control: ios
  • APP Control: Android
  • Remote Control: No
  • Bluetooth: No
  • FM/AM Tuner: No
  • Material: Metal
  • Model Number: SU-6
  • model: SU-6














---SpecificationsSplit---

 

Product introduction:
The SU-6 digital interface is a new generation of high-performance USB digital audio interface. It uses XMOS' latest xCORE-200 series and Xilinx's high-performance large-scale PGA chip. The SU-6 is a digital interface using a thermostat-level clock system. Crystek's two CCHD-957 femtosecond crystal oscillators provide a solid foundation for the superior audio signal quality of the SU-6 output. The SU-6 digital interface uses a standard USB2.0 input interface, while the SU-6 has a rich output interface, including S/PDI for fiber/coaxial RCA and BNC outputs, AES/EBU for XLR balanced output, RJ45 and HDMI interfaces. Output I2S (including DSD ON signal), clock output supports MCLK main clock and WCLK word clock. The power system design was optimized and the audio section was powered by a 7.5F (7.5 million uf) supercapacitor.

SU-6 is newly developed USB interface, which is positioned at the high-end interface. Compared with previous products, we mainly use the following four new self-developed technologies:

1, built-in CPLD pre-shaping technology, FPGA-based source synchronization technology re-shaping the isolated I2S signal, thus eliminating the additive jitter caused by the isolation chip.

2, the newly designed FPGA algorithm, built-in FIFO buffers the data and then outputs, SPDIF output is re-encoded by FPGA, so that the coaxial output can support PCM 384K and DSD DOP128 at the highest.

3, using CRYSTEK's CCHD-957 high-performance femtosecond crystal oscillator, with the self-developed constant temperature system and ultra-low noise super capacitor power supply system, further improve the short-stability performance of the clock.

4. Original single clock system, all circuits of the whole machine adopt synchronous clock design, in which USB clock is synthesized by PLL derived from femtosecond clock.

 

Technical indicators:
Sample rate supported by each output interface:

PCM: 44.1KHz, 48KHz, 88.2KHz, 96KHz,

176.4KHz, 192KHz, 352.8KHz, 384KHz

[I2S out and WCLK out support all sampling rates, S/PDI and AES/EBU support up to 384K, of which fiber supports up to 192K]

DSD: 2.8 MHz (DSD64) - DoP, native

5.6 MHz (DSD128) - DoP, native

11.2 MHz (DSD256) - DoP, native

22.5 MHz (DSD512) - Native

[I2S out supports all DSD formats, S/PDI and AES/EBU support DSD128 DOP mode, where fiber supports up to DOP64]

Bit width: up to 32 bit over I2S output

Highly 24 bit over S/PDI, AES/EBU

Electrical standards for each interface:

1, USB input socket is a standard USB-B type female socket, USB power supply range is 4.5V-5.1V;
2, DC POWER input socket adopts DC2.1 socket, supports 7.5V-9V DC input (power supply requirement is 3A).
3, BNC interface and RCA interface output standard S/PDI signal, the level is 550mV (connected to standard load), the output impedance is 75 ohms;
4, XLR interface output standard AES / EBU signal, the level is 3.3V (connected to standard load), the output impedance is 110 ohms;
5, the word clock (WCLK) output uses BNC interface, the level is TTL (no load), the output impedance is 75 ohms;
6, 2 channels of HDMI-I2S signal output through HDMI socket, the output of four signals including MCLK, BCLK, LRCLK, SDATA signal, using standard LVDS differential level, impedance control at 100 ohms. Among them, PIN13-15 of HDMI socket is DSD_ON signal, when high level is I2S works in DSD mode, level is LVTTL; PIN18 is 5V weak power output (output current is less than 20ma), which can be used as interface plug-in indication; The 2-way output I2S line sequence is the same.
7, RJ45-I2S output I2S signal is CMOS (5V) single-ended signal, low-impedance output, the output of four signals including MCLK, BCLK, LRCLK, SDATA signal.
8, the optical fiber port outputs standard optical signals.

 

plan the details:
1, implement the design concept of electric sound as the mother of sound, pay attention to the design of power circuit, use external DC input, built-in super capacitor power supply, with high performance, low noise and fast response LDO. The whole board is powered by up to 6 independent LDOs. The digital audio board is powered by a secondary LDO. The clock part even uses ADI's ultra-low noise LDO, which lays a solid foundation for ensuring the ultimate performance of the output.
2, In order to ensure excellent electrical transmission performance, XLR sockets are made of Swiss Neutrik products, USB-B sockets are made of TE, and enthusiast BNC and RCA coaxial sockets are made by Taiwanese manufacturers. Even the fuses are selected from the United States. Litteluse model.
3, the audio motherboard uses a 4-layer circuit board design to ensure a complete ground plane and power plane, high-speed digital design method to ensure the signal integrity and power integrity of the entire board. Special processing of the clock signal, using packet design and accurate impedance control, thus ensuring the signal quality of the clock and improving its anti-interference ability.
4, input and output signals are in accordance with the standard design, especially the USB high-speed signal uses 90 ohm impedance control, also built-in anti-static TVS protection circuit; The I2S signal uses the LVDS differential level standard, the impedance is controlled at 100 ohms, and the four outputs all use independent LVDS drivers.

System compatibility:

1, Windows 7, Windows 8, Windows 10; 32/64 bit, need to install dedicated driver
2, Native MacOS 10.6 and later, using the system comes with a driver
3, Native Linux with UAC2 compliant kernel, using the system's own driver, (tested on Ubuntu and Daphile systems, based on INTEL X86 platform)
4, Android OS 4.2 and above, the device needs to support OTG function, in general, the Android 5.0 system is supported by default, the following 5.0 recommendations with a dedicated player.
HDMI -I2Soutput:
 
1. LVDS differential signal with a level of 3.3V;
2. DSD ON signal, 5V power supply (small current), MUTE signal internal PGA has been processed, there will be no need to output MUTE signal;
3. The DSD ON signal can be defined by itself. The DSD ON signal can be arbitrarily output to the PIN13, 14, 15, and 16 pins of the socket.
4. The phases of PIN1-3 and PIN7-9 are adjustable, and the user can configure the phase of the two pairs of outputs through a switch.

 

Flexible I2S and clock configuration:

1.Switches 1-4 correspond to PIN13-16 pins with HDMI sockets. Pull to ON position, it means that the PIN foot has the output function of DSD_ON signal.
2. Switches 5 and 6 are modes that configure the clock output:

When the switch 5 is at the time of O, the clock outputs MCLK, and when it is ON, the clock outputs WCK;

The switch 6 is configured with the frequency of MCLK, when O is 22.5792M/24.576M, and when ON is 45.1584M/49.152M;

The configuration of switch 6 is valid for CLK OUT, RJ45-I2S, and HDMI-I2S.

3. The switch 7 can separately set the left and right channels in the DSD mode of the I2S signal.
4. Switch 8 can set the line sequence of BCLK in the I2S signal.; When O, PIN4 is BCLK+, and PIN6 is BCLK-;
5. Switch 9 can set the line sequence of LRCLK in the I2S signal.; When O, PIN7 is LRCLK+, and PIN9 is LRCLK-;
6. Switch 10 can set the line sequence of DATA in I2S signal; When O, PIN1 is DATA+ and PIN3 is DATA-;

Note: Coaxial, fiber, AES/EBU output is not affected by the above DIP switch; The line sequence of RJ45-I2S is fixed, and it needs to adapt to different interfaces. Users need to customize the network cable.

Size:
The length and width of the chassis: 238MM * 170MM * 46MM, does not include the height of the feet and the protruding part of the connector behind the chassis.
The weight of a single machine is about: 1.6KG.
The length and width of the carton packaging: 350MM*230MM*110MM.
Package weight: 2.0KG
Accessories: One USB cable, one power adapter (global, AC100V-240V), one power cord  . . . . . .
Shipping Notes
  • Free Standard Shipping on $100+ Orders to the USA.
  • Except Preorder products are shipped in 48 hours.
  • Delivery to the USA:
  1. Standard Shipping : 3-10 business days
  • If time is of the essence, please consider selecting expedited delivery for faster service.
Exchange/Return Notes
  • We offer a 30-day return/exchange service after receiving.
  • Final sale items are not eligible for returns or exchanges.
  • To process your return/exchange, please contact us at [email protected]
  • Please click here for more details>>> Return & Exchange Policy
SKU: 28945620036

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